Teradar is pioneering a new era in perception with the world's first automotive terahertz vision sensor, delivering ultra-high resolution imaging in any weather condition. Founded in Boston, Teradar's solid-state, chip-scale technology unlocks safer, smarter vehicles and opens the door to transformative applications in mobility, defense, and beyond.

Boston MA or San Jose CA (hybrid)

• Define and architect digital subsystems within RFICs
• Partition functionality between analog, mixed-signal, and digital domains to optimize performance, area, and power
• Develop subsystem-level digital specifications in collaboration with RF, analog, and systems teams.
• Own register/memory maps, digital interfaces, and configuration settings, diagnostic/test profiles
• Own the digital design and ensure design meets PVT, reliability, and automotive quality standards (FuSa, AEC-Q100, ISO 26262)
• Support synthesis, STA, clock-domain crossing, low-power design, and DFT with physical design teams
• Ensure robustness across PVT, ESD, reliability, and automotive qualification corners (if applicable)
• Review ECOs, timing fixes, and power optimization strategies
• Lead activities for the design and implement high-performance, low-power analog and mixed-signal blocks eg bandgap references, temperature sensors, diagnostic ADCs, programmable gain amplifiers, power detectors, bias circuits
• Derive block-level specifications from system requirements and contribute to architecture discussions
• Own schematic design, pre-/post-layout simulation, and verification using industry-standard EDA tools
• Collaborate with layout engineers to ensure robust and efficient physical design
• Support silicon bring-up, validation, and debug in the lab
• Partner with RF, digital, and systems engineers to enable seamless integration of mixed-signal IP into the overall sensor SoC

• 10+ years hands-on experience in digital design with the understanding of analog and mixed-signal IC design, ideally in CMOS technologies at 28nm TSMC
• Expertise in the following: SPI/I2C or other high speed digital interfaces, bandgap design, temperature sensors, biasing circuits, IFM, PGA, power detection, or diagnostic ADCs
• Strong experience with RTL design in Verilog/SystemVerilog
• Proficiency with digital simulation and debug tools (Questa, VCS, Xcelium, etc.)
• Familiarity with synthesis, STA, and power-aware design flows
• Solid background in low-power design methodologies and tradeoffs
• Proficiency with Cadence Virtuoso, Spectre, and AMS simulation tools
• Experience with lab validation, silicon debug, and characterization
• MS or Ph.D. in Electrical Engineering or equivalent

Bonus: prior exposure to sensor products, or radar-based systems

To apply, or for more information, please send a copy of your resume to: